smsc LAN9313/LAN9313i revision 1.9 (03-13-12) product preview data brief product features LAN9313/LAN9313i three port 10/100 managed ethernet switch with mii highlights ? high performance and full featured 3 port switch with vlan, qos packet prioritization, rate limiting, igmp monitoring and management functions ? serial management via spi/i 2 c or smi ? unique virtual phy feature simplifies software development by mimicking t he multiple switch ports as a single port phy ? integrated ieee 1588 hardware time stamp unit target applications ? cable, satellite, and ip set-top boxes ? digital televisions ? digital video recorders ? voip/video phone systems ? home gateways ? test/measurement equipment ? industrial au tomation systems key benefits ? ethernet switch fabric ? 32k buffer ram ? 1k entry forwarding table ? port based ieee 802.1q vlan support (16 groups) ? programmable ieee 802.1q tag insertion/removal ? ieee 802.1d spanning tree protocol support ? qos/cos packet prioritization ? 4 dynamic qos queues per port ? input priority determined by vlan tag, da lookup, tos, diffserv or port default value ? programmable class of se rvice map based on input priority ? remapping of 802.1q priority field on per port basis ? programmable rate limiting at the ingress/egress ports with random early discard, per port / priority ? igmp v1/v2/v3 monitoring for multicast packet filtering ? programmable filter by mac address ? switch management ? port mirroring/monitoring/sn iffing: ingress and/or egress traffic on any ports or port pairs ? fully compliant statistics (mib) gathering counters ? control registers configurable on-the-fly ? ports ? 2 internal 10/100 phys with hp auto-mdix support ? 1 mii - phy mode or mac mode ? fully compliant with ieee 802.3 standards ? 10base-t and 100base-tx support ? full and half duplex support ? full duplex flow control ? backpressure (forced collisi on) half duplex flow control ? automatic flow control based on programmable levels ? automatic 32-bit crc generation and checking ? 2k jumbo packet support ? programmable interframe gap, flow control pause value ? full transmit/receive statistics ? auto-negotiation ? automatic mdi/mdi-x ? loop-back mode ? serial management ? spi/i 2 c (slave) access to all internal registers ? miim (mdio) access to phy related registers ? smi (extended miim) access to all internal registers ? ieee 1588 hardware time stamp unit ? global 64-bit tunable clock ? master or slave mode per port ? time stamp on tx or rx of sync and delay_req packets per port, timestamp on gpio ? 64-bit timer comparator event generation (gpio or irq) ? other features ? general purpose timer ? serial eeprom interface (i 2 c master or microwire tm master) for non-managed configuration ? programmable gpios/leds ? single 3.3v power supply ? available in commercial & industrial temp. ranges
order number(s): LAN9313-nu for 128-pin, vtqfp lead-free rohs compliant package (0 to 70 c temp range) LAN9313-nzw for 128-pin, xvtqfp lead-free rohs compliant package (0 to 70 c temp range) LAN9313i-nzw for 128-pin, xvtqfp lead-free rohs compliant package (-40 to 85 c temp range) LAN9313-nu-tr for 128-pin, vtqfp lead-free rohs compliant package (0 to 70 c temp range) LAN9313-nzw-tr for 128-pin, xvtqfp lead-free rohs compliant package (0 to 70 c temp range) LAN9313i-nzw-tr for 128-pin, xvtqfp lead-free rohs compliant package (-40 to 85 c temp range) tr indicates tape & reel option. this product meets the halogen maximu m concentration values per iec61249-2-21 for rohs compliance an d environmental information, please visit www.smsc.com/rohs three port 10/100 managed et hernet switch with mii revision 1.9 (03-13-12) 2 smsc LAN9313/LAN9313i product preview copyright ? 2012 smsc or its subsidiaries. all rights reserved. circuit diagrams and other information relating to smsc produc ts are included as a means of illustrating typical applications. consequently, complete information sufficient for construction purposes is not necessarily given. although the information has been checked and is believed to be accurate, no re sponsibility is assumed for inaccuracies. smsc reserves the right to make changes to specifications and produc t descriptions at any time without notice. contact your local sm sc sales office to obtain the latest specifications before placing your product order. the provision of this inform ation does not convey to the purchaser of the described semicond uctor devices any licenses under any patent rights or other intellectual property rights of smsc or others. all sales are expressly conditional on your agreement to the te rms and conditions of the most recently dated version of smsc's standard terms of sale agreement dated before the date of your order (the "terms of sale agreement"). the pro duct may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. anomaly sheets are availab le upon request. smsc products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. any and all such uses without prior written approval of an officer of smsc and further testing and/or modification will be fully at the risk of the customer. copies of this document or other smsc literature, as well as the terms of sale agreement, may be obtained by visiting smsc?s website at h ttp://www.smsc.com. smsc is a registered trademark of standard microsystems corporation (?smsc?). product names and company names are the trademarks of their respective holders. smsc disclaims and excludes any and all warrant ies, including without limi tation any and all implied warranties of merchantabil ity, fitness for a particular purpose, title, a nd against infringement and the like, and any and all warranties arising from any cou rse of dealing or usage of trade. in no event shall smsc be liable for any direct, incidental, indi rect, special, punitive, or cons equential damages; or for lost data, profits, savings or revenues of any kind; regardless of the form of action, whether based on contrac t; tort; negligence of smsc or others; strict liability; breach of wa rranty; or otherwise; whether or not any remedy of buyer is h eld to have failed of its essential purpose, and whether or not smsc has been advised of the possibility of such damages.
three port 10/100 managed ethernet switch with mii smsc LAN9313/LAN9313i 3 revision 1.9 (03-13-12) product preview general description the LAN9313/LAN9313i is a full featured, 3 por t 10/100 managed ethernet switch designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. the LAN9313/LAN9313i combines all the fu nctions of a 10/100 switch system, including the switch fabric, packet buffers, buffer manager, media access controllers (macs), phy transceivers, and serial management. the LAN9313/LAN9313i complies with the ieee 802.3 (full/half-duplex 10base- t and 100base-tx) ethernet protocol specification and 802.1d/802.1q network management protocol specifications, enabling compatibility with industry standard ethernet and fast ethernet applications. at the core of the LAN9313/LAN9313i is the high performance, high efficiency 3 port ethernet switch fabric. the switch fabric contains a 3 port vlan layer 2 switch engine that supports untagged, vlan tagged, and priority tagged frames. the switch fabric provides an extensive feature set which includes spanning tree protocol support, multicast packe t filtering and quality of service (qos) packet prioritization by vlan tag, dest ination address, port default valu e or diffserv/tos, allowing for a range of prioritization implementations. 32k of buff er ram allows for the storage of multiple packets while forwarding operations are completed, and a 1k entry forwarding table provides ample room for mac address forwarding tables. each port is allocated a cluster of 4 dynamic qos queues which allow each queue size to grow and shrink with traffic, effectively utilizing all available memory. this memory is managed dynamically via the buffer manager block wi thin the switch fabric. all aspects of the switch fabric are managed via the switch fabric configuration and status registers, which are indirectly accessible via the system cont rol and status registers. the LAN9313/lan9 313i provides 3 sw itched ports. each port is full y compliant with the ieee 802.3 standard and all internal macs and phys support full/ha lf duplex 10base- t and 100base-tx operation. the LAN9313/LAN9313i provides 2 on-ch ip phys, 1 virtual phy and 3 macs. the virtual phy and the third mac are used to connect the LAN9313/LAN9313i switch fabric to an external mac or phy. all ports support automatic or manual full duplex flow control or half duplex backpressure (forced collision) flow control. 2k jumbo packet (2048 byte) s upport allows for oversized packet transfers, effectively increasing throughput whil e deceasing cpu load. all mac and phy related settings are fully configurable via their re spective registers within the LAN9313/LAN9313i. the integrated spi, i 2 c and smi slave controllers allow for full serial management of the LAN9313/LAN9313i via the integrated spi/i 2 c serial interface or mii interface respectively. the inclusion of these interfaces allo ws for greater flexibility in the incorporation of the LAN9313/LAN9313i into various designs. it is this flexibility which allows the LAN9313/LAN9313i to operate in 2 different modes and under various management conditions. in mac mode, the LAN9313/LAN9313i can be connected to an external phy via the mii interf ace. in phy mode, the LAN9313/LAN9313i can be connected to an external mac via the mii interface. in both mac and phy modes, the LAN9313/LAN9313i can be unmanaged, smi managed, i 2 c managed or spi managed. this flexibility in management makes the LAN9313/LAN9313i a c andidate for virtually all switch applications. the LAN9313/LAN9313i contains an i 2 c/microwire master eeprom controller for connection to an optional eeprom. this allows for the storage and retrieval of static data. the internal eeprom loader can be optionally configured to automatically load stored configuration settings from the eeprom into the LAN9313/lan931 3i at reset, allowing the LAN9313/LAN9313 i to operate unmanaged. in addition to the primary functionality described above, the LAN9313/lan9 313i provides additional features designed for extended functionality. thes e include a configurable 16-bit general purpose timer (gpt), a 32-bit 25mhz free running counter, a 12-bit configurable gpio/led interface, and ieee 1588 time stamping on all ports and select gpios. the ieee time stam p unit provides a 64-bit tunable clock for accurate ptp timing and a timer comparator to allow time based interrupt generation. the LAN9313/LAN9313i?s performance, features and small size make it an ideal solution for many applications in the consumer el ectronics and industrial automati on markets. targeted applications include: set top boxes (cable, satellite and ip), digital televisions, digital video recorders, voice over ip and video phone systems, home gateways, and test and measurement equipment. system-level and block-level diagrams of the LAN9313/LAN9313i can be seen in on the following pages.
three port 10/100 managed et hernet switch with mii revision 1.9 (03-13-12) 4 smsc LAN9313/LAN9313i product preview system level block diagrams figure 1 system level block diagram utilizing the LAN9313/LAN9313i in mac mode figure 2 system level block diagram util izing the LAN9313/LAN9313i in phy mode magnetics magnetics to ethernet to ethernet gpios/leds (optional) eeprom (optional) LAN9313/LAN9313i i 2 c/microwire magnetics to ethernet external 25mhz crystal 10/100 phy mii magnetics magnetics to ethernet to ethernet gpios/leds (optional) eeprom (optional) LAN9313/LAN9313i i 2 c/microwire external 25mhz crystal 10/100 mac miim mii
three port 10/100 managed ethernet switch with mii smsc LAN9313/LAN9313i 5 revision 1.9 (03-13-12) product preview internal block diagram figure 3 LAN9313/LAN9313i internal block diagram eeprom controller i 2 c (master) microwire (master) spi (slave) i 2 c (slave) controller to optional cpu serial management (via i 2 c/spi slave) spi / i 2 c switch fabric 10/100 mac 10/100 mac 10/100 mac ieee 1588 time stamp to optional phy, mac, or smi master smi (slave) controller to ethernet 10/100 phy ieee 1588 time stamp to ethernet 10/100 phy mii/mdio ieee 1588 time stamp LAN9313/LAN9313i secondary functions (timers,gpios,leds,irq) ieee 1588 clock & events i 2 c / microwire to optional eeprom (via i 2 c/microwire master)
three port 10/100 managed et hernet switch with mii revision 1.9 (03-13-12) 6 smsc LAN9313/LAN9313i product preview 128-vtqfp package outline figure 4 LAN9313 128-vtqfp package definition table 1 LAN9313 128-vtqfp dimensions min nominal max remarks a - - 1.20 overall package height a1 0.05 - 0.15 standoff a2 0.95 1.00 1.05 body thickness d/e 15.80 16.00 16.20 x/y span d1/e1 13.80 14.00 14.20 x/y plastic body size l 0.45 0.60 0.75 lead foot length b 0.13 0.18 0.23 lead width c 0.09 - 0.20 lead foot thickness e 0.40 bsc lead pitch ddd 0.00 - 0.07 true position spread ccc - - 0.08 coplanarity
three port 10/100 managed ethernet switch with mii smsc LAN9313/LAN9313i 7 revision 1.9 (03-13-12) product preview notes: 1. all dimensions are in mill imeters unless otherwise noted. 2. dimensions b & c apply to the flat section of the l ead foot between 0.10 and 0.25mm from the lead tip. the base metal is exposed at the lead tip. 3. dimensions d1 and e1 do not include mold protrusi ons. maximum allowed protrusion is 0.25mm per side. d1 and e1 are maximum plastic body size dimensions including mold mismatch. 4. the pin 1 identifier may vary, but is always located within the zone indicated. figure 5 LAN9313 128-vtqfp recommended pcb land pattern
three port 10/100 managed et hernet switch with mii revision 1.9 (03-13-12) 8 smsc LAN9313/LAN9313i product preview 128-xvtqfp package outline figure 6 LAN9313/LAN9313i 128-xvtqfp package definition
three port 10/100 managed ethernet switch with mii smsc LAN9313/LAN9313i 9 revision 1.9 (03-13-12) product preview notes: 1. all dimensions are in mill imeters unless otherwise noted. 2. dimensions b & c apply to the flat section of the l ead foot between 0.10 and 0.25mm from the lead tip. the base metal is exposed at the lead tip. 3. dimensions d1 and e1 do not include mold protrusi ons. maximum allowed protrusion is 0.25mm per side. d1 and e1 are maximum plastic body size dimensions including mold mismatch. 4. dimensions d2 and e2 represent the size of the ex posed pad. the exposed pad shall be coplanar with the bottom of the package within 0.05mm. 5. the pin 1 identifier may vary, but is always located within the zone indicated. table 2 LAN9313/LAN9313i 128-xvtqfp dimensions min nominal max remarks a - - 1.20 overall package height a1 0.05 - 0.15 standoff a2 0.95 1.00 1.05 body thickness d/e 15.80 16.00 16.20 x/y span d1/e1 13.80 14.00 14.20 x/y plastic body size d2/e2 6.35 6.50 6.65 x/y exposed pad size l 0.45 0.60 0.75 lead foot length b 0.13 0.18 0.23 lead width c 0.09 - 0.20 lead foot thickness e 0.40 bsc lead pitch ddd 0.00 - 0.07 true position spread ccc - - 0.08 coplanarity figure 7 LAN9313/LAN9313i 128-xvtqfp recommended pcb land pattern
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